415 search results - page 66 / 83 » On the energy-efficiency of speculative hardware |
114
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ISCA
2010
IEEE
15 years 5 months ago
2010
IEEE
Over the past decade there has been a surge of academic and industrial interest in optimistic concurrency, i.e. the speculative parallel execution of code regions that have the se...
93
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ISSS
2002
IEEE
15 years 5 months ago
2002
IEEE
Scheduling is widely recognized as a very important step in highlevel synthesis. Nevertheless, it is usually done without taking into account the effects on the actual hardware im...
110
Voted
ICS
1999
Tsinghua U.
15 years 4 months ago
1999
Tsinghua U.
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
93
Voted
ISCA
1998
IEEE
15 years 4 months ago
1998
IEEE
Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these diffe...
101
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MICRO
1998
IEEE
15 years 4 months ago
1998
IEEE
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...