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ISCIS
2009
Springer
15 years 6 months ago
Using a SAT solver to generate checking sequences
—Methods for software testing based on Finite State Machines (FSMs) have been researched since the early 60’s. Many of these methods are about generating a checking sequence fr...
Guy-Vincent Jourdan, Hasan Ural, Hüsnü Y...
ESTIMEDIA
2007
Springer
15 years 5 months ago
Data-Parallel Code Generation from Synchronous Dataflow Specification of Multimedia Applications
Embedded software design for MPSoC needs parallel programming. Popular programming languages such as C and C++ are not adequate for initial specification since they are designed f...
Seongnam Kwon, Choonseung Lee, Soonhoi Ha
EURODAC
1990
IEEE
92views VHDL» more  EURODAC 1990»
15 years 3 months ago
Accelerated test pattern generation by cone-oriented circuit partitioning
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
Torsten Grüning, Udo Mahlstedt, Wilfried Daeh...
VL
1995
IEEE
158views Visual Languages» more  VL 1995»
15 years 3 months ago
DiaGen: A Generator for Diagram Editors Providing Direct Manipulation and Execution of Diagrams
Diagrams (e.g., flowcharts, trees for hierarchical structures, or graphs for finite state machines) are often needed as part of visual language systems and advanced user interfa...
Mark Minas, Gerhard Viehstaedt
IADIS
2003
15 years 27 days ago
Generating Guided Tours over Indexed Information Resources
This article proposes an approach to the generation of guided tours over indexed information resources on user demand. It represents an alternative to more sophisticated hyperdocu...
Benjamin Buffereau, Pierre Duchet, Philippe Picoue...