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103
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SCALESPACE
1997
Springer
15 years 5 months ago
From High Energy Physics to Low Level Vision
A geometric framework for image scale space, enhancement, and segmentation is presented. We consider intensity images as surfaces in the (x I) space. The image is thereby a 2D surf...
Ron Kimmel, Nir A. Sochen, Ravi Malladi
MICRO
1993
IEEE
128views Hardware» more  MICRO 1993»
15 years 5 months ago
Techniques for extracting instruction level parallelism on MIMD architectures
Extensive research has been done on extracting parallelism from single instruction stream processors. This paper presents some results of our investigation into ways to modify MIM...
Gary S. Tyson, Matthew K. Farrens
108
Voted
DAC
1992
ACM
15 years 4 months ago
High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers
Designing instruction set processors and constructing their compilers are mutually dependent tasks. Piper is a high level synthesis tool of ADAS which controls the hardware-softwa...
Ing-Jer Huang, Alvin M. Despain
148
Voted
ICCD
1992
IEEE
126views Hardware» more  ICCD 1992»
15 years 4 months ago
High-Level State Machine Specification and Synthesis
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
81
Voted
UML
2000
Springer
15 years 4 months ago
Supporting Several Levels of Restriction in the UML
The emergence of the Unified Modeling Language (UML) has provided software developers with an effective and efficient shared language. However, UML is often too restrictive in init...
Christian Heide Damm, Klaus Marius Hansen, Michael...