Sciweavers

2167 search results - page 369 / 434
» On the need for statistical timing analysis
Sort
View
ISLPED
1999
ACM
150views Hardware» more  ISLPED 1999»
15 years 4 months ago
Using dynamic cache management techniques to reduce energy in a high-performance processor
In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. P...
CSMR
1998
IEEE
15 years 3 months ago
Towards Mature Measurement Programs
Many organizations are using measurement as a means to improve their software development and maintenance processes. A reasonable consensus has been reached about the main success...
Frank Niessink, Hans van Vliet
INFOCOM
1997
IEEE
15 years 3 months ago
Investigation of the IEEE 802.11 Medium Access Control (MAC)
Analysis of the drafi IEEE 802.11 wireless local area network (WLAN) standard is needed to characterize the expected performance of the standard’s ad hoc and infrastructure netw...
Brian P. Crow, Indra Widjaja, Jeong Geun Kim, Pres...
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
15 years 3 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
PLILP
1993
Springer
15 years 3 months ago
Higher-Order Chaotic Iteration Sequences
Chaotic iteration sequences is a method for approximating fixpoints of monotonic functions proposed by Patrick and Radhia Cousot. It may be used in specialisation algorithms for ...
Mads Rosendahl