Abstract. Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size to application charac...
Matthew A. Watkins, Sally A. McKee, Lambert Schael...
We present an algorithm to perform a simultaneous modular reduction of several residues. This enables to compress polynomials into integers and perform several modular operations ...
– This paper presents the realization of the digital block of a hardware simulator of MIMO propagation channels for UMTS and WLAN applications. The hardware simulator must reprod...
Sylvie Picol, Gheorghe Zaharia, Dominique Houzet, ...
Based on the renowned method of Bitton et al. (see [1]) we develop a concise but comprehensive analytical model for the well-known Binary Merge Sort, Bitonic Sort, Nested-Loop Join...
This paper presents a performance analysis of wireless ad-hoc networks, with ieee 802.11 as the underlying wireless lan technology. wlan has, due to the fair radio resource sharin...