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» On theorem proving in annotated logics
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DATE
1999
IEEE
123views Hardware» more  DATE 1999»
15 years 2 months ago
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
Nazanin Mansouri, Ranga Vemuri
LPAR
2010
Springer
14 years 8 months ago
Generating Counterexamples for Structural Inductions by Exploiting Nonstandard Models
Induction proofs often fail because the stated theorem is noninductive, in which case the user must strengthen the theorem or prove auxiliary properties before performing the induc...
Jasmin Christian Blanchette, Koen Claessen
ATVA
2004
Springer
138views Hardware» more  ATVA 2004»
15 years 1 months ago
Providing Automated Verification in HOL Using MDGs
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
Tarek Mhamdi, Sofiène Tahar
ECAI
2004
Springer
15 years 3 months ago
Guiding a Theorem Prover with Soft Constraints
Attempts to use finite models to guide the search for proofs by resolution and the like in first order logic all suffer from the need to trade off the expense of generating and m...
John K. Slaney, Arnold Binas, David Price
ESOP
2005
Springer
15 years 3 months ago
Asserting Bytecode Safety
Abstract. We instantiate an Isabelle/HOL framework for proof carrying code to Jinja bytecode, a downsized variant of Java bytecode featuring objects, inheritance, method calls and ...
Martin Wildmoser, Tobias Nipkow