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ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
15 years 6 months ago
Language-Based High Level Transaction Extraction on On-chip Buses
Abstract— With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of th...
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chie...
78
Voted
ASPDAC
2006
ACM
100views Hardware» more  ASPDAC 2006»
15 years 6 months ago
Generation of shorter sequences for high resolution error diagnosis using sequential SAT
Commonly used pattern sources in simulation-based verification include random, guided random, or design verification patterns. Although these patterns may help bring the design ...
Sung-Jui (Song-Ra) Pan, Kwang-Ting Cheng, John Moo...
124
Voted
ASAP
2005
IEEE
135views Hardware» more  ASAP 2005»
15 years 6 months ago
Via-Aware Global Routing for Good VLSI Manufacturability and High Yield
CAD tools have become more and more important for integrated circuit (IC) design since a complicated system can be designed into a single chip, called system-on-a-chip (SOC), in w...
Yang Yang, Tong Jing, Xianlong Hong, Yu Hu, Qi Zhu...
117
Voted
FPT
2005
IEEE
170views Hardware» more  FPT 2005»
15 years 6 months ago
High Quality Uniform Random Number Generation Through LUT Optimised Linear Recurrences
This paper describes a class of FPGA-specific uniform random number generators with a 2k −1 length period, which can provide k random bits per-cycle for the cost of k Lookup Ta...
David B. Thomas, Wayne Luk
105
Voted
SSD
2005
Springer
122views Database» more  SSD 2005»
15 years 6 months ago
Selectivity Estimation of High Dimensional Window Queries via Clustering
Abstract. Query optimization is an important functionality of modern database systems and often based on estimating the selectivity of queries before actually executing them. Well-...
Christian Böhm, Hans-Peter Kriegel, Peer Kr&o...