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VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
16 years 1 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
DATE
1998
IEEE
91views Hardware» more  DATE 1998»
15 years 5 months ago
Interconnect Tuning Strategies for High-Performance Ics
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahu...
90
Voted
HPDC
1997
IEEE
15 years 5 months ago
A Secure Communications Infrastructure for High-Performance Distributed Computing
We describe a software infrastructure designed to support the development of applications that use high-speed networks to connect geographically distributed supercomputers, databa...
Ian T. Foster, Nicholas T. Karonis, Carl Kesselman...
92
Voted
USS
2008
15 years 3 months ago
Highly Predictive Blacklisting
The notion of blacklisting communication sources has been a well-established defensive measure since the origins of the Internet community. In particular, the practice of compilin...
Jian Zhang, Phillip A. Porras, Johannes Ullrich
99
Voted
BMCBI
2006
114views more  BMCBI 2006»
15 years 23 days ago
A high level interface to SCOP and ASTRAL implemented in Python
Background: Benchmarking algorithms in structural bioinformatics often involves the construction of datasets of proteins with given sequence and structural properties. The SCOP da...
James A. Casbon, Gavin E. Crooks, Mansoor A. S. Sa...