17 search results - page 3 / 4 » On wirelength estimations for row-based placement |
ICCAD
2006
IEEE
14 years 3 months ago
2006
IEEE
— This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distrib...
ISPD
2000
ACM
13 years 10 months ago
2000
ACM
As technology advances, more and more issues need to be considered in the placement stage, e.g., wirelength, congestion, timing, coupling. It is very hard to consider all of them ...
ISVLSI
2007
IEEE
14 years 19 days ago
2007
IEEE
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
FPGA
1999
ACM
13 years 10 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
ISPD
2010
ACM
14 years 1 months ago
2010
ACM
Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, ...