191 search results - page 15 / 39 » On-Chip Communication Architecture for OC-768 Network Proces... |
101
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HPCA
2009
IEEE
16 years 7 days ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
101
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ISICT
2003
15 years 1 months ago
2003
Historically, a typical avionics system architecture has been designed as a federated architecture of black-boxes with well-defined functions and implemented on fully dedicated co...
113
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ICPPW
2006
IEEE
15 years 5 months ago
2006
IEEE
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
FPL
2005
Springer
15 years 5 months ago
2005
Springer
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
ICCD
2002
IEEE
15 years 8 months ago
2002
IEEE
Our goal is to identify the key architectural and design issues related to Sensor Networks (SNs), evaluate the proposed solutions, and to outline the most challenging research dir...