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DAC
2002
ACM
16 years 20 days ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
ANCS
2006
ACM
15 years 3 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo
IPPS
2000
IEEE
15 years 4 months ago
ClusterNet: An Object-Oriented Cluster Network
Abstract. Parallel processing is based on utilizing a group of processors to efficiently solve large problems faster than is possible on a single processor. To accomplish this, the...
Raymond Hoare
NOCS
2007
IEEE
15 years 6 months ago
Transaction-Based Communication-Centric Debug
Abstract— The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC...
Kees Goossens, Bart Vermeulen, Remco van Steeden, ...
ASPDAC
2008
ACM
126views Hardware» more  ASPDAC 2008»
15 years 1 months ago
A Multi-Processor NoC platform applied on the 802.11i TKIP cryptosystem
Since 2001, there have been a myriad of papers on systematic analysis of Multi-Processor System on Chip (MPSoC) and Network on Chip (NoC). Nevertheless, we only have a few of their...
Jung-Ho Lee, Sung-Rok Yoon, Kwang-Eui Pyun, Sin-Ch...