191 search results - page 19 / 39 » On-Chip Communication Architecture for OC-768 Network Proces... |
VLSISP
1998
14 years 11 months ago
1998
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
116
click to vote
MICRO
2008
IEEE
15 years 6 months ago
2008
IEEE
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
90
Voted
WCE
2007
15 years 26 days ago
2007
Massively parallel distributed-memory architectures are receiving increasing attention to meet the increasing demand on processing power. Many topologies have been proposed for int...
CGO
2006
IEEE
15 years 5 months ago
2006
IEEE
Multicluster architectures overcome the scaling problem of centralized resources by distributing the datapath, register file, and memory subsystem across multiple clusters connec...
109
click to vote
ISVLSI
2002
IEEE
15 years 4 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...