Sciweavers

191 search results - page 30 / 39
» On-Chip Communication Architecture for OC-768 Network Proces...
Sort
View
SIGCOMM
2009
ACM
15 years 6 months ago
PortLand: a scalable fault-tolerant layer 2 data center network fabric
This paper considers the requirements for a scalable, easily manageable, fault-tolerant, and efficient data center network fabric. Trends in multi-core processors, end-host virtua...
Radhika Niranjan Mysore, Andreas Pamboris, Nathan ...
106
Voted
PVM
2010
Springer
14 years 10 months ago
Adaptive MPI Multirail Tuning for Non-uniform Input/Output Access
Multicore processors have not only reintroduced Non-Uniform Memory Access (NUMA) architectures in nowadays parallel computers, but they are also responsible for non-uniform access ...
Stephanie Moreaud, Brice Goglin, Raymond Namyst
PDP
2009
IEEE
15 years 6 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 4 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
111
Voted
ICPP
1993
IEEE
15 years 3 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...