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ISCA
2008
IEEE
125views Hardware» more  ISCA 2008»
15 years 3 months ago
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support
Current state-of-the-art on-chip networks provide efficiency, high throughput, and low latency for one-to-one (unicast) traffic. The presence of one-to-many (multicast) or one-t...
Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H....
ISQED
2007
IEEE
206views Hardware» more  ISQED 2007»
15 years 3 months ago
Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, ...
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
15 years 1 months ago
A Generic Architecture for On-Chip Packet-Switched Interconnections
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...
Pierre Guerrier, Alain Greiner
GLOBECOM
2009
IEEE
15 years 1 months ago
On-Chip Integrated Antenna Structures in CMOS for 60 GHz WPAN Systems
Abstract--This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for w...
Felix Gutierrez Jr., Kristen Parrish, Theodore S. ...
96
Voted
SIPS
2008
IEEE
15 years 3 months ago
Traffic-balanced IP mapping algorithm for 2D-mesh On-Chip-Networks
Intellectual Properties (IPs) mapping algorithms for On-Chip-Networks (OCNs) allocate a set of IPs onto given network topologies. The existing mapping algorithms limit a single IP...
Ting-Jung Lin, Shu-Yen Lin, An-Yeu Wu