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GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 2 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
ISHPC
1999
Springer
15 years 2 months ago
Integrity and Performance in Network Attached Storage
Computer security is of growing importance in the increasingly networked computing environment.This work examines the issue of high-performance network security, specifically int...
Howard Gobioff, David Nagle, Garth A. Gibson
MICRO
1998
IEEE
128views Hardware» more  MICRO 1998»
15 years 2 months ago
Putting the Fill Unit to Work: Dynamic Optimizations for Trace Cache Microprocessors
The fill unit is the structure which collects blocks of instructions and combines them into multi-block segments for storage in a trace cache. In this paper, we expand the role of...
Daniel H. Friendly, Sanjay J. Patel, Yale N. Patt
FPL
1998
Springer
86views Hardware» more  FPL 1998»
15 years 2 months ago
Self Modifying Circuitry - A Platform for Tractable Virtual Circuitry
The readily available performance advantages, gained in early virtual circuitry systems, are being recouped following advances in general purpose processor architectures and have ...
Adam Donlin
PODC
1997
ACM
15 years 2 months ago
Lazy Consistency Using Loosely Synchronized Clocks
Thispaperdescribesanewschemeforguaranteeingthattransactions in a client/server system observe consistent state while they are running. The scheme is presented in conjunction with ...
Atul Adya, Barbara Liskov