704 search results - page 120 / 141 » On-chip logic minimization |
AAAI
2007
15 years 3 days ago
2007
There are a number of frameworks for modelling argumentation in logic. They incorporate a formal representation of individual arguments and techniques for comparing conflicting a...
AAAI
2007
15 years 3 days ago
2007
Recently defined resolution calculi for Max-SAT and signed Max-SAT have provided a logical characterization of the solving techniques applied by Max-SAT and WCSP solvers. In this...
WSC
2008
15 years 3 days ago
2008
Discrete Rate Simulation (DRS) is a modeling methodology that uses event based logic to simulate linear continuous processes and hybrid systems. These systems are concerned with t...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Recent research results have shown that the traditional structural testing for delay and crosstalk faults may result in over-testing due to the non-trivial number of such faults t...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
— A novel wave-pipelined global interconnect system is developed for reliable, high throughput, on-chip data communication. We argue that because there is only a single signal pr...