704 search results - page 131 / 141 » On-chip logic minimization |
116
click to vote
ICCD
2008
IEEE
15 years 6 months ago
2008
IEEE
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
DAC
2009
ACM
15 years 4 months ago
2009
ACM
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
ICDT
2009
ACM
15 years 4 months ago
2009
ACM
Managing inconsistency in databases has long been recognized as an important problem. One of the most promising approaches to coping with inconsistency in databases is the framewo...