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» On-chip logic minimization
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DAC
2007
ACM
15 years 1 months ago
Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits
Mixed Vt has been widely used to control leakage without affecting circuit performance. However, current approaches target the combinational circuits even though sequential elemen...
Jun Seomun, Jaehyun Kim, Youngsoo Shin
USENIX
2000
14 years 11 months ago
Location-Aware Scheduling with Minimal Infrastructure
Mobile computers often benefit from software which adapts to their location. For example, a computer might be backed up when at the office, or the default printer might always be ...
John S. Heidemann, Dhaval Shah
AIML
1998
14 years 11 months ago
Interpolation, Definability and Fixed Points in Interpretability Logics
In this article we study interpolation properties for the minimal system of interpretability logic IL. We prove that arrow interpolation holds for IL and that turnstile interpolati...
Carlos Areces, Eva Hoogland, Dick de Jongh
ORDER
2010
100views more  ORDER 2010»
14 years 8 months ago
Quantum Logic in Dagger Kernel Categories
This paper investigates quantum logic from the perspective of categorical logic, and starts from minimal assumptions, namely the existence of involutions/daggers and kernels. The ...
Chris Heunen, Bart Jacobs
CSREAESA
2003
14 years 11 months ago
Power Optimized Combinational Logic Design
In this paper we address the problem of minimization of power consumption in combinational circuits by minimizing the number of switching transitions at the output nodes of each g...
R. V. Menon, S. Chennupati, Naveen K. Samala, Damu...