Sciweavers

704 search results - page 53 / 141
» On-chip logic minimization
Sort
View
ISMVL
2003
IEEE
125views Hardware» more  ISMVL 2003»
15 years 3 months ago
Compact Representations of Logic Functions using Heterogeneous MDDs
In this paper, we propose a compact representation of logic functions using Multi-valued Decision Diagrams (MDDs) called heterogeneous MDDs. In a heterogeneous MDD, each variable ...
Shinobu Nagayama, Tsutomu Sasao
ECAI
2008
Springer
14 years 11 months ago
Belief Revision through Forgetting Conditionals in Conditional Probabilistic Logic Programs
Abstract. In this paper, we present a revision strategy of revising a conditional probabilistic logic program (PLP) when new information is received (which is in the form of probab...
Anbu Yue, Weiru Liu
AAAI
2000
14 years 11 months ago
Towards a Logic-Based Theory of Argumentation
There are a number of frameworks for modelling argumentation in logic. They incorporate formal representation of individual arguments and techniques for comparing conflicting argu...
Philippe Besnard, Anthony Hunter
INFOCOM
2010
IEEE
14 years 8 months ago
Overcoming Failures: Fault-tolerance and Logical Centralization in Clean-Slate Network Management
—We investigate the design of a clean-slate control and nt plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of logically c...
Hammad Iqbal, Taieb Znati
ICCAD
2008
IEEE
117views Hardware» more  ICCAD 2008»
15 years 6 months ago
On the numbers of variables to represent sparse logic functions
— In an incompletely specified function f, don’t care values can be chosen to minimize the number of variables to represent f. It is shown that, in incompletely specified fun...
Tsutomu Sasao