704 search results - page 57 / 141 » On-chip logic minimization |
ICCD
2005
IEEE
15 years 6 months ago
2005
IEEE
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
CORR
2007
Springer
14 years 10 months ago
2007
Springer
The study of finite automata and regular languages is a privileged meeting point of algebra and logic. Since the work of Büchi, regular languages have been classified according ...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Circuit fabrics composed of highly regular structures, called logic bricks, have been described recently for improving yield. An automated logic brick design flow based on a SAT ...
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CONCUR
2006
Springer
14 years 12 months ago
2006
Springer
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
VTS
2002
IEEE
15 years 2 months ago
2002
IEEE
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...