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» On-chip logic minimization
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ICDT
1990
ACM
110views Database» more  ICDT 1990»
15 years 2 months ago
Beginnings of a Theory of General Database Completions
Ordinary logical implication is not enough for answering queries in a logic database, since especially negative information is only implicitly represented in the database state. M...
Stefan Brass
DAC
1999
ACM
15 years 11 months ago
Simultaneous Circuit Partitioning/Clustering with Retiming for Performance Optimization
Partitioning and clustering are crucial steps in circuit layout for handling large scale designs enabled by the deep submicron technologies. Retiming is an important sequential lo...
Jason Cong, Honching Li, Chang Wu
DIS
2007
Springer
15 years 4 months ago
A Consequence Finding Approach for Full Clausal Abduction
Abductive inference has long been associated with the logic of scientific discovery and automated abduction is now being used in real scientific tasks. But few methods can exploi...
Oliver Ray, Katsumi Inoue
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
15 years 3 months ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar
ASPDAC
2007
ACM
80views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Recognition of Fanout-free Functions
Factoring is a logic minimization technique to represent a Boolean function in an equivalent function with minimum literals. When realizing the circuit, a function represented in ...
Tsung-Lin Lee, Chun-Yao Wang