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» On-chip logic minimization
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ASPDAC
2006
ACM
116views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Abridged addressing: a low power memory addressing strategy
Abstract— The memory subsystem is known to comprise a significant fraction of the power dissipation in embedded systems. The memory addressing strategy, which determines the seq...
Preeti Ranjan Panda
DEXAW
2002
IEEE
99views Database» more  DEXAW 2002»
15 years 2 months ago
Using Preference Order in Ontologies
The latest ontology languages can be translated into a description logic (DL), thus providing them with a formal semantics and associated reasoning procedures. We introduce the or...
Stijn Heymans, Dirk Vermeir
DFT
2002
IEEE
121views VLSI» more  DFT 2002»
15 years 2 months ago
Testing Digital Circuits with Constraints
Many digital circuits have constraints on the logic values a set of signal lines can have. In this paper, we present two new techniques for detecting the illegal combinations of l...
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McC...
CL
2000
Springer
15 years 2 months ago
Applications of Annotated Predicate Calculus to Querying Inconsistent Databases
Abstract. We consider the problem of specifying and computing consistent answers to queries against databases that do not satisfy given integrity constraints. This is done by simul...
Marcelo Arenas, Leopoldo E. Bertossi, Michael Kife...
NDJFL
2002
74views more  NDJFL 2002»
14 years 9 months ago
The Semantics of Entailment Omega
This paper discusses the relation between the minimal positive relevant logic B+ and intersection and union type theories. There is a marvellous coincidence between these very diff...
Mariangiola Dezani-Ciancaglini, Robert K. Meyer, Y...