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» On-chip logic minimization
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CADE
2009
Springer
15 years 10 months ago
Decidability Results for Saturation-Based Model Building
Abstract. Saturation-based calculi such as superposition can be successfully instantiated to decision procedures for many decidable fragments of first-order logic. In case of termi...
Matthias Horbach, Christoph Weidenbach
ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
15 years 2 months ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
TPLP
2002
117views more  TPLP 2002»
14 years 9 months ago
On Properties of Update Sequences Based on Causal Rejection
In this paper, we consider an approach to update nonmonotonic knowledge bases represented as extended logic programs under the answer set semantics. In this approach, new informat...
Thomas Eiter, Michael Fink, Giuliana Sabbatini, Ha...
ICC
2007
IEEE
104views Communications» more  ICC 2007»
15 years 4 months ago
A Novel Graph Model for Maximum Survivability in Mesh Networks under Multiple Generic Risks
— This paper investigates the path protection problem in mesh networks under multiple generic risks. Disjoint logical links may fail simultaneously if they share the same compone...
Qingya She, Xiaodong Huang, Jason P. Jue
ICSOC
2007
Springer
15 years 4 months ago
Let It Flow: Building Mashups with Data Processing Pipelines
Mashups are a new kind of interactive Web application, built out of the composition of two or more existing Web service APIs and data sources. Whereas “pure” mashups are built ...
Biörn Biörnstad, Cesare Pautasso