704 search results - page 72 / 141 » On-chip logic minimization |
ISLPED
2004
ACM
15 years 3 months ago
2004
ACM
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
PADS
2004
ACM
15 years 3 months ago
2004
ACM
With Parallel and Discrete Event Simulation (PDES) techniques, the runtime performance of detailed wireless network simulation can be improved significantly without compromising ...
BMCBI
2008
14 years 10 months ago
2008
Background: Metabolic networks present a complex interconnected structure, whose understanding is in general a non-trivial task. Several formal approaches have been developed to s...
IJNSEC
2007
14 years 10 months ago
2007
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
ET
2000
14 years 9 months ago
2000
: We present a method for obtaining a minimal set of test configurations and their associated set oftest patterns that completely tests re-programmable Programmable Logic Arrays (P...