704 search results - page 74 / 141 » On-chip logic minimization |
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RTSS
1997
IEEE
15 years 2 months ago
1997
IEEE
This paper presents an on-the-fly and symbolic algorithm for checking whether a timed automaton satisfies a formula of a timed temporal logic which is more expressive than TCTL....
ICCAD
1996
IEEE
15 years 2 months ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
VTS
1996
IEEE
15 years 2 months ago
1996
IEEE
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
DOCENG
2007
ACM
15 years 1 months ago
2007
ACM
We describe ongoing research on segmenting and labeling HTML medical journal articles. In contrast to existing approaches in which HTML tags usually serve as strong indicators, we...
ASAP
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...