704 search results - page 79 / 141 » On-chip logic minimization |
VTS
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
NMR
2004
Springer
15 years 3 months ago
2004
Springer
There are a number of frameworks for modelling argumentation in logic. They incorporate a formal representation of individual arguments and techniques for comparing conflicting a...
ICSE
2001
IEEE-ACM
15 years 2 months ago
2001
IEEE-ACM
Support for dynamic and client-specific customization is required in many application areas. We present a (distributed) application as consisting of a minimal functional core – ...
DSD
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
103
click to vote
JELIA
2010
Springer
14 years 8 months ago
2010
Springer
Abstract. Many proposals for logic-based formalizations of argumentation consider an argument as a pair (Φ, α), where the support Φ is understood as a minimal consistent subset ...