704 search results - page 82 / 141 » On-chip logic minimization |
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
PERCOM
2009
ACM
15 years 4 months ago
2009
ACM
—We present a middleware platform for assembling pervasive applications that demand fault-tolerance and adaptivity in distributed, dynamic environments. Unlike typical adaptive m...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
AGILE
2007
Springer
15 years 4 months ago
2007
Springer
Using qualitative reasoning with geographic information, contrarily, for instance, with robotics, looks not only fastidious (i.e.: encoding knowledge Propositional Logics PL), but ...
SPIN
2007
Springer
15 years 4 months ago
2007
Springer
Abstract. We present an approach for the veri cation of spatial properties with Spin. We rst extend one of Spin's main property speci cation mechanisms, i.e., the linear-time...