704 search results - page 96 / 141 » On-chip logic minimization |
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
1 The increasing test data volume needed to test core-based System-on-Chip contributes to long test application times (TAT) and huge automatic test equipment (ATE) memory requireme...
TABLEAUX
2007
Springer
15 years 4 months ago
2007
Springer
Axiom pinpointing has been introduced in description logics (DLs) to help the user to understand the reasons why consequences hold and to remove unwanted consequences by computing ...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
—The Delay Filtered Dual Interlocked storage Cell (DF-DICE) offers a scalable solution in different radiation environments for soft error mitigation. The area and speed performan...
VTS
2005
IEEE
15 years 3 months ago
2005
IEEE
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
SIGMOD
2005
ACM
15 years 3 months ago
2005
ACM
There is a class of data, including messages and business workflow state, for which conventional monolithic databases are less than ideal. Performance and scalability of Applicati...