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ISMVL
1997
IEEE
134views Hardware» more  ISMVL 1997»
15 years 2 months ago
Functional Decomposition of MVL Functions Using Multi-Valued Decision Diagrams
In this paper, the minimization of incompletely specified multi-valued functions using functional decomposition is discussed. From the aspect of machine learning, learning sample...
Craig M. Files, Rolf Drechsler, Marek A. Perkowski
VLSID
1997
IEEE
112views VLSI» more  VLSID 1997»
15 years 2 months ago
Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs
An exclusive-OR transform of input variables significantly reduces the size of the PLA implementation for adder and comparator circuits. For n bit adder circuits, the size of PLA ...
James Jacob, P. Srinivas Sivakumar, Vishwani D. Ag...
EURODAC
1994
IEEE
118views VHDL» more  EURODAC 1994»
15 years 2 months ago
A new knowledge-based design manager assistant for CAD frameworks
In this paper we introduce a new knowledgebased method for planning and managing the VLSI design process, based on prediction and advice, that minimizes search in a wide design sp...
Félix Moreno, Juan M. Meneses
SAT
2010
Springer
141views Hardware» more  SAT 2010»
15 years 1 months ago
Synthesizing Shortest Linear Straight-Line Programs over GF(2) Using SAT
Non-trivial linear straight-line programs over the Galois field of two elements occur frequently in applications such as encryption or high-performance computing. Finding the shor...
Carsten Fuhs, Peter Schneider-Kamp
CPAIOR
2006
Springer
15 years 1 months ago
Allocation, Scheduling and Voltage Scaling on Energy Aware MPSoCs
Abstract. In this paper we introduce a complex allocation and scheduling problem for variable voltage Multi-Processor System-on-Chip (MPSoC) platforms. We propose a methodology to ...
Luca Benini, Davide Bertozzi, Alessio Guerri, Mich...