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JPDC
2000
141views more  JPDC 2000»
14 years 9 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 2 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
CCGRID
2003
IEEE
15 years 2 months ago
Using grid technologies to face medical image analysis challenges
The availability of digital imagers inside hospitals and their ever growing inspection capabilities have established digital medical images as a key component of many pathologies ...
Johan Montagnat, Vincent Breton, Isabelle E. Magni...
HIS
2009
14 years 7 months ago
Design Methodology of a Fault Aware Controller Using an Incipient Fault Diagonizer
The problem of failure diagnosis has received a considerable attention in the domain of reliability engineering, process control and computer science. The increasing stringent req...
Joydeb Roychoudhury, Tribeni Prasad Banerjee, Anup...
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JIPS
2006
129views more  JIPS 2006»
14 years 9 months ago
Automatic Reading System for On-off Type DNA Chip
: In this study we propose an automatic reading system for diagnostic DNA chips. We define a general specification for an automatic reading system and propose a possible implementa...
Munho Ryu, Jong Dae Kim, Jongwon Kim