Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing or routability. In this paper, we develop e cient wirelength estimation techniqu...
Andrew E. Caldwell, Andrew B. Kahng, Stefanus Mant...
Online communities increasingly rely on reputation information to foster cooperation and deter cheating. As rational agents can often benefit from misreporting their observations,...
This study analyzed rhythm and timing in 18 instant messenger (IM) conversations between one advisor and four graduate students (4 dyads), hypothesizing that individuals would sho...
We examine the write endurance of USB flash drives using a range of approaches: chip-level measurements, reverse engineering, timing analysis, whole-device endurance testing, and ...
This paper presents a model of the behavior of candidates for promotion to administrator status in Wikipedia. It uses a policy capture framework to highlight similarities and diff...