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JCC
2010
105views more  JCC 2010»
15 years 2 months ago
PAPER - Accelerating parallel evaluations of ROCS
Abstract: Modern graphics processing units (GPUs) are flexibly programmable and have peak computational throughput significantly faster than conventional CPUs. Herein, we describ...
Imran S. Haque, Vijay S. Pande
IROS
2008
IEEE
272views Robotics» more  IROS 2008»
15 years 10 months ago
Design of a new decoupled XY flexure parallel kinematic manipulator with actuator isolation
— The design procedure for a totally decoupled XY flexure parallel kinematic manipulator is presented in this paper. The designed XY stage is featured with flexure hinges and a...
Yangmin Li, Qingsong Xu
TKDE
2012
198views Formal Methods» more  TKDE 2012»
13 years 6 months ago
Distributed Line Graphs: A Universal Technique for Designing DHTs Based on Arbitrary Regular Graphs
— Most proposed DHTs engage certain topology maintenance mechanisms specific to the static graphs on which they are based. The designs of these mechanisms are complicated and rep...
Yiming Zhang, Ling Liu
ISCAS
2008
IEEE
185views Hardware» more  ISCAS 2008»
15 years 10 months ago
A full-custom design of AES SubByte module with signal independent power consumption
—A full-custom design of AES SubByte module based on Sense Amplifier Based Logic is proposed in this paper. Power consumption of this design is independent of both value and sequ...
Liang Li, Jun Han, Xiaoyang Zeng, Jia Zhao
DAC
2005
ACM
16 years 4 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...