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LICS
2006
IEEE
15 years 8 months ago
Temporal Logics and Model Checking for Fairly Correct Systems
We motivate and study a generic relaxation of correctness of reactive and concurrent systems with respect to a temporal specification. We define a system to be fairly correct if...
Daniele Varacca, Hagen Völzer
97
Voted
APSEC
2005
IEEE
15 years 8 months ago
A Lightweight Integration of Theorem Proving and Model Checking for System Verification
Weiqiang Kong, Takahiro Seino, Kokichi Futatsugi, ...
79
Voted
DATE
2005
IEEE
98views Hardware» more  DATE 2005»
15 years 8 months ago
Space-Efficient Bounded Model Checking
Jacob Katz, Ziyad Hanna, Nachum Dershowitz
103
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ICCAD
2005
IEEE
140views Hardware» more  ICCAD 2005»
15 years 8 months ago
Embedded tutorial: formal equivalence checking between system-level models and RTL
Alfred Koelbl, Yuan Lu, Anmol Mathur
139
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ISORC
2005
IEEE
15 years 8 months ago
Model-Checking of Component-Based Event-Driven Real-Time Embedded Software
As complexity of real-time embedded software grows, it is desirable to use formal verification techniques to achieve a high level of assurance. We discuss application of model-ch...
Zonghua Gu, Kang G. Shin