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VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
16 years 2 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
POPL
2004
ACM
16 years 2 months ago
Incremental execution of transformation specifications
We aim to specify program transformations in a declarative style, and then to generate executable program transformers from such specifications. Many transformations require non-t...
Ganesh Sittampalam, Oege de Moor, Ken Friis Larsen
TOOLS
2009
IEEE
15 years 9 months ago
Guaranteeing Syntactic Correctness for All Product Line Variants: A Language-Independent Approach
A software product line (SPL) is a family of related program variants in a well-defined domain, generated from a set of features. A fundamental difference from classical applicati...
Christian Kästner, Sven Apel, Salvador Trujil...
MFCS
2009
Springer
15 years 9 months ago
Balanced Paths in Colored Graphs
We consider finite graphs whose edges are labeled with elements, called colors, taken from a fixed finite alphabet. We study the problem of determining whether there is an infi...
Alessandro Bianco, Marco Faella, Fabio Mogavero, A...
KBSE
2008
IEEE
15 years 8 months ago
The Consistency of Web Conversations
Abstract—We describe BPELCheck, a tool for statically analyzing interactions of composite web services implemented in BPEL. Our algorithm is compositional, and checks each proces...
Jeffrey Fischer, Rupak Majumdar, Francesco Sorrent...