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GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 6 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
ACL2
2006
ACM
15 years 6 months ago
Combining ACL2 and an automated verification tool to verify a multiplier
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...
Erik Reeber, Jun Sawada
CONCUR
2006
Springer
15 years 6 months ago
Proving Liveness by Backwards Reachability
Abstract. We present a new method for proving liveness and termination properties for fair concurrent programs, which does not rely on finding a ranking function or on computing th...
Parosh Aziz Abdulla, Bengt Jonsson, Ahmed Rezine, ...
123
Voted
APN
1995
Springer
15 years 6 months ago
Modular State Space Analysis of Coloured Petri Nets
State Space Analysis is one of the most developed analysis methods for Petri Nets. The main problem of state space analysis is the size of the state spaces. Several ways to reduce ...
Søren Christensen, Laure Petrucci
APLAS
2008
ACM
15 years 4 months ago
Context-Sensitive Relevancy Analysis for Efficient Symbolic Execution
Abstract. Symbolic execution is a flexible and powerful, but computationally expensive technique to detect dynamic behaviors of a program. In this paper, we present a context-sensi...
Xin Li, Daryl Shannon, Indradeep Ghosh, Mizuhito O...