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» OpenJ: An Extensible System Level Design Language
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CODES
2005
IEEE
15 years 3 months ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau
IPPS
2006
IEEE
15 years 3 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
JAVA
2000
Springer
15 years 1 months ago
Development routes for message passing parallelism in Java
Java is an attractive environment for writing portable message passing parallel programs. Considerable work in message passing interface bindings for the C and Fortran languages h...
J. A. Mathew, Heath A. James, Kenneth A. Hawick
TLDI
2005
ACM
102views Formal Methods» more  TLDI 2005»
15 years 3 months ago
An open and shut typecase
Two different ways of defining ad-hoc polymorphic operations commonly occur in programming languages. With the first form polymorphic operations are defined inductively on the...
Dimitrios Vytiniotis, Geoffrey Washburn, Stephanie...
FDL
2003
IEEE
15 years 3 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...