63 search results - page 8 / 13 » Operating System Controlled Processor-Memory Bus Encryption |
IROS
2007
IEEE
15 years 6 months ago
2007
IEEE
— We present a refined, second-generation design, construction and integration, of a compact hyper-redundant snakelike robot, called “Woodstock.” This robot has substantial a...
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CASES
2005
ACM
15 years 1 months ago
2005
ACM
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
SPAA
2000
ACM
15 years 4 months ago
2000
ACM
This paper presents mathematical foundations for the design of a memory controller subcomponent that helps to bridge the processor/memory performance gap for applications with str...
SRDS
2003
IEEE
15 years 4 months ago
2003
IEEE
We demonstrate that symmetric-key cryptography can be used for both read and write access control. One-time write access can be granted by handing over an encryption key, and our ...
USENIX
2001
15 years 1 months ago
2001
SMP Click is a software router that provides both flexibility and high performance on stock multiprocessor PC hardware. It achieves high performance using device, buffer, and queu...