Sciweavers

1845 search results - page 223 / 369
» Operating System Performance in Support of Real-Time Middlew...
Sort
View
ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
15 years 9 months ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
CSREAESA
2006
15 years 4 months ago
The Satellite Data Model
The Satellite Data Model (SDM) is part of the Air Force Research Laboratory (AFRL) Responsive Space Testbed Initiative. It is a developing standard for rapid integration of hardwa...
Kenneth Sundberg, Scott Cannon, Todd Hospodarsky, ...
184
Voted
OOPSLA
2010
Springer
15 years 1 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek
123
Voted
SOSP
2007
ACM
16 years 11 days ago
Information flow control for standard OS abstractions
ion Flow Control for Standard OS Abstractions Maxwell Krohn Alexander Yip Micah Brodsky Natan Cliffer M. Frans Kaashoek Eddie Kohler† Robert Morris MIT CSAIL †UCLA http://flum...
Maxwell N. Krohn, Alexander Yip, Micah Z. Brodsky,...
OSDI
2006
ACM
16 years 3 months ago
Experiences Building PlanetLab
This paper reports our experiences building PlanetLab over the last four years. It identifies the requirements that shaped PlanetLab, explains the design decisions that resulted fr...
Larry L. Peterson, Andy C. Bavier, Marc E. Fiuczyn...