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ICCD
1996
IEEE
134views Hardware» more  ICCD 1996»
15 years 3 months ago
Pausible Clocking: A First Step Toward Heterogeneous Systems
This paper describes a novel communication scheme, which is guaranteed to be free of synchronization failures, amongst multiple synchronous modules operating independently. In thi...
Kenneth Y. Yun, Ryan P. Donohue
85
Voted
IJCNN
2000
IEEE
15 years 4 months ago
Simulation of a Digital Neuro-Chip for Spiking Neural Networks
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
Tim Schönauer, S. Atasoy, N. Mehrtash, Heinri...
DEPCOS
2008
IEEE
180views Hardware» more  DEPCOS 2008»
15 years 6 months ago
A Resilient SIL 2 Driver Machine Interface for Train Control Systems
In railway train-borne equipment, the Driver Machine Interface (DMI) acts like a bridge between the train driver and the onboard automatic train control system (European Vital Com...
Andrea Ceccarelli, István Majzik, Danilo Io...
MSS
1999
IEEE
118views Hardware» more  MSS 1999»
15 years 4 months ago
Designing a Self-Maintaining Storage System
This paper shows the suitability of a "self-maintaining" approach to Tertiary Disk, a large-scale disk array system built from commodity components. Instead of incurring...
Satoshi Asami, Nisha Talagala, David A. Patterson
TOMACS
1998
140views more  TOMACS 1998»
14 years 11 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...