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IEEEPACT
2005
IEEE
15 years 5 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
MICRO
2005
IEEE
163views Hardware» more  MICRO 2005»
15 years 5 months ago
ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
Smruti R. Sarangi, Wei Liu, Yuanyuan Zhou
ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
15 years 5 months ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...
CVBIA
2005
Springer
15 years 5 months ago
Local or Global Minima: Flexible Dual-Front Active Contours
Most variational active contour models are designed to find the “desirable” local minima of data-dependent energy functionals with the hope of avoiding undesirable configurat...
Hua Li, Anthony J. Yezzi
ISRR
2005
Springer
201views Robotics» more  ISRR 2005»
15 years 5 months ago
Advances in High Resolution Imaging from Underwater Vehicles
Large area mapping at high resolution underwater continues to be constrained by the mismatch between available navigation as compared to sensor accuracy. In this paper we present ...
Hanumant Singh, Christopher N. Roman, Oscar Pizarr...