-- This paper describes the operation of a field programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (...
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
Charles L. Cathey, Jason D. Bakos, Duncan A. Buell
This paper presents a new development of the NeuroVaria method. NeuroVaria computes relevant atmospheric and oceanic parameters by minimizing the difference between the observed s...
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
A 3D Heterogeneous Sensor using a stacked chip is investigated. Optical Active Pixel Sensor and IR Bolometer detectors are combined to create a multispectral pixel for aligned col...