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IEEEPACT
2009
IEEE
15 years 4 months ago
SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
Lei Jin, Sangyeun Cho
CASES
2004
ACM
15 years 3 months ago
Procedure placement using temporal-ordering information: dealing with code size expansion
Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache ...
Christophe Guillon, Fabrice Rastello, Thierry Bida...
CADE
1998
Springer
15 years 2 months ago
System Description: card TAP: The First Theorem Prover on a Smart Card
Abstract. We present the first implementation of a theorem prover running on a smart card. The prover is written in Java and implements a dual tableau calculus. Due to the limited ...
Rajeev Goré, Joachim Posegga, Andrew Slater...
JFP
2010
107views more  JFP 2010»
14 years 8 months ago
Lightweight checkpointing for concurrent ML
Transient faults that arise in large-scale software systems can often be repaired by re-executing the code in which they occur. Ascribing a meaningful semantics for safe re-execut...
Lukasz Ziarek, Suresh Jagannathan
WABI
2009
Springer
132views Bioinformatics» more  WABI 2009»
15 years 4 months ago
mpscan: Fast Localisation of Multiple Reads in Genomes
Abstract. With Next Generation Sequencers, sequence based transcriptomic or epigenomic assays yield millions of short sequence reads that need to be mapped back on a reference geno...
Eric Rivals, Leena Salmela, Petteri Kiiskinen, Pet...