6601 search results - page 1160 / 1321 » Optimal Distributed Arc-Consistency |
151
click to vote
SPAA
2009
ACM
16 years 5 months ago
2009
ACM
We consider buffer management of unit packets with deadlines for a multi-port device with reconfiguration overhead. The goal is to maximize the throughput of the device, i.e., the...
136
click to vote
PODC
2009
ACM
16 years 5 months ago
2009
ACM
Transactional memories are typically speculative and rely on contention managers to cure conflicts. This paper explores a complementary approach that prevents conflicts by schedul...
130
click to vote
HPCA
2009
IEEE
16 years 5 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
144
click to vote
HPCA
2009
IEEE
16 years 5 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
131
click to vote
TCC
2009
Springer
16 years 5 months ago
2009
Springer
: The aim of this paper is to demonstrate the feasibility of authenticated throughput-ecient routing in an unreliable and dynamically changing synchronous network in which the majo...