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IESS
2007
Springer
116views Hardware» more  IESS 2007»
15 years 11 months ago
Utilizing Reconfigurable Hardware to Optimize Workflows in Networked Nodes
This work investigates the use of reconfigurable devices as computing platform for self-organizing embedded systems. Those usually consist of a set of distributed, autonomous node...
Dominik Murr, Felix Mühlbauer, Falko Dressler...
IPPS
2006
IEEE
15 years 11 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
IPPS
2006
IEEE
15 years 11 months ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
IPPS
2006
IEEE
15 years 11 months ago
A decomposition approach for optimizing the performance of MPI libraries
MPI provides a portable message passing interface for many parallel execution platforms but may lead to inefficiencies for some platforms and applications. In this article we sho...
O. Hartmann, Matthias Kühnemann, Thomas Raube...
ICPP
2005
IEEE
15 years 10 months ago
Optimizing Collective Communications on SMP Clusters
We describe a generic programming model to design collective communications on SMP clusters. The programming model utilizes shared memory for collective communications and overlap...
Meng-Shiou Wu, Ricky A. Kendall, Kyle Wright