Sciweavers

12 search results - page 1 / 3
» Optimal Euler Circuit of Maximum Contiguous Cost
Sort
View
41
Voted
IEICET
2007
50views more  IEICET 2007»
14 years 10 months ago
Optimal Euler Circuit of Maximum Contiguous Cost
Yu Qiao, Makoto Yasuhara
91
Voted
FMCAD
2007
Springer
15 years 4 months ago
Fast Minimum-Register Retiming via Binary Maximum-Flow
We present a formulation of retiming to minimize the number of registers in a design by iterating a maximum network flow problem. The retiming returned will be the optimum one whi...
Aaron P. Hurst, Alan Mishchenko, Robert K. Brayton
TC
1998
14 years 10 months ago
Optimal Zero-Aliasing Space Compaction of Test Responses
—Many built-in self-testing (BIST) schemes compress the test responses from a k-output circuit to q signature streams, where q << k, a process termed space compaction. The ...
Krishnendu Chakrabarty, Brian T. Murray, John P. H...
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
15 years 7 months ago
Simultaneous short-path and long-path timing optimization for FPGAs
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
Ryan Fung, Vaughn Betz, William Chow
74
Voted
DAC
2010
ACM
15 years 2 months ago
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement
Carbon Nanotubes (CNTs) are grown using chemical synthesis, and the exact positioning and chirality of CNTs are very difficult to control. As a result, “small-width” Carbon Na...
Jie Zhang, Shashikanth Bobba, Nishant Patil, Alber...