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CGO
2005
IEEE
15 years 5 months ago
Maintaining Consistency and Bounding Capacity of Software Code Caches
Software code caches are becoming ubiquitous, in dynamic optimizers, runtime tool platforms, dynamic translators, fast simulators and emulators, and dynamic compilers. Caching fre...
Derek Bruening, Saman P. Amarasinghe
EUROPAR
2005
Springer
15 years 5 months ago
Batch-Scheduling Dags for Internet-Based Computing
The process of scheduling computations for Internet-based computing presents challenges not encountered with more traditional platforms for parallel and distributed computing. The...
Grzegorz Malewicz, Arnold L. Rosenberg
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
15 years 5 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
CASES
2003
ACM
15 years 5 months ago
Exploiting bank locality in multi-bank memories
Bank locality can be defined as localizing the number of load/store accesses to a small set of memory banks at a given time. An optimizing compiler can modify a given input code t...
Guilin Chen, Mahmut T. Kandemir, Hendra Saputra, M...
PLDI
2010
ACM
15 years 5 months ago
Z-rays: divide arrays and conquer speed and flexibility
Arrays are the ubiquitous organization for indexed data. Throughout programming language evolution, implementations have laid out arrays contiguously in memory. This layout is pro...
Jennifer B. Sartor, Stephen M. Blackburn, Daniel F...