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CODES
2008
IEEE
15 years 9 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
CODES
2007
IEEE
15 years 9 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
IPSN
2007
Springer
15 years 9 months ago
Design and implementation of a wireless sensor network for intelligent light control
We present the design and implementation of the Illuminator, a preliminary sensor network-based intelligent light control system for entertainment and media production. Unlike mos...
Heemin Park, Jeff Burke, Mani B. Srivastava
LCTRTS
2007
Springer
15 years 9 months ago
Scratchpad allocation for data aggregates in superperfect graphs
Existing methods place data or code in scratchpad memory, i.e., SPM by either relying on heuristics or resorting to integer programming or mapping it to a graph coloring problem. ...
Lian Li 0002, Quan Hoang Nguyen, Jingling Xue
LCTRTS
2007
Springer
15 years 9 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
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