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» Optimal Non-deterministic Functional Logic Computations
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ISQED
2005
IEEE
125views Hardware» more  ISQED 2005»
15 years 5 months ago
A New Method for Design of Robust Digital Circuits
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...
PEPM
1999
ACM
15 years 3 months ago
Declarative Aspect-Oriented Programming
Aspect-oriented programming addresses the problem that the implementation of some properties such as error handling and optimization tends to cross-cut the basic functionality. To...
Ralf Lämmel
ERSA
2006
111views Hardware» more  ERSA 2006»
15 years 1 months ago
Promises and Pitfalls of Reconfigurable Supercomputing
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
Maya Gokhale, Christopher Rickett, Justin L. Tripp...
TCAD
2002
99views more  TCAD 2002»
14 years 11 months ago
Analysis of on-chip inductance effects for distributed RLC interconnects
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
Kaustav Banerjee, Amit Mehrotra
DAC
2005
ACM
16 years 18 days ago
Enhanced leakage reduction Technique by gate replacement
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
Lin Yuan, Gang Qu