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119
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VTS
2007
IEEE
71views Hardware» more  VTS 2007»
15 years 8 months ago
Optimizing Test Length for Soft Faults in DRAM Devices
: Soft faults in DRAMs are faults that do not get sensitized directly after an operation is performed, but require a time to pass before the fault can be detected. Tests developed ...
Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev
ETS
2006
IEEE
100views Hardware» more  ETS 2006»
15 years 8 months ago
Optimized Signature-Based Statistical Alternate Test for Mixed-Signal Performance Parameters
— Accurate generation of circuit specifications from test signatures is a difficult problem, since analytical expressions cannot precisely describe the nonlinear relationships ...
Byoungho Kim, Hongjoong Shin, Ji Hwan (Paul) Chun,...
102
Voted
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
15 years 9 months ago
Test architecture design and optimization for three-dimensional SoCs
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
Li Jiang, Lin Huang, Qiang Xu
125
Voted
CEC
2009
IEEE
15 years 9 months ago
Constructing test problems for bilevel evolutionary multi-objective optimization
— Many real-world problems demand a feasible solution to satisfy physical equilibrium, stability, or certain properties which require an additional lower level optimization probl...
Kalyanmoy Deb, Ankur Sinha
ENTCS
2002
79views more  ENTCS 2002»
15 years 2 months ago
Debugging and Testing Optimizers through Comparison Checking
We present a novel technique called comparison checking that helps optimizer writers debug optimizers by testing, for given inputs, that the semantics of a program are not changed...
Clara Jaramillo, Rajiv Gupta, Mary Lou Soffa