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» Optimal Vector Selection for Low Power BIST
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DATE
2010
IEEE
180views Hardware» more  DATE 2010»
15 years 2 months ago
A reconfigurable cache memory with heterogeneous banks
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
Domingo Benitez, Juan C. Moure, Dolores Rexachs, E...
INFOCOM
2008
IEEE
15 years 4 months ago
On Reducing Mesh Delay for Peer-to-Peer Live Streaming
—Peer-to-peer (P2P) technology has emerged as a promising scalable solution for live streaming to large group. In this paper, we address the design of overlay which achieves low ...
Dongni Ren, Y.-T. Hillman Li, Shueng-Han Gary Chan
80
Voted
ICCAD
2007
IEEE
153views Hardware» more  ICCAD 2007»
15 years 6 months ago
Checking equivalence of quantum circuits and states
Among the post-CMOS technologies currently under investigation, quantum computing (QC) holds a special place. QC offers not only extremely small size and low power, but also expon...
George F. Viamontes, Igor L. Markov, John P. Hayes
CVPR
2009
IEEE
16 years 4 months ago
Recognising Action as Clouds of Space-Time Interest Points
Much of recent action recognition research is based on space-time interest points extracted from video using a Bag of Words (BOW) representation. It mainly relies on the discrimi...
Matteo Bregonzio (Queen Mary, University of London...
191
Voted
ICDE
2009
IEEE
290views Database» more  ICDE 2009»
15 years 11 months ago
GraphSig: A Scalable Approach to Mining Significant Subgraphs in Large Graph Databases
Graphs are being increasingly used to model a wide range of scientific data. Such widespread usage of graphs has generated considerable interest in mining patterns from graph datab...
Sayan Ranu, Ambuj K. Singh